1. Field of the Invention
The present invention relates to a defect reviewing apparatus for reviewing various types of defects generated in a process of manufacturing a semiconductor wafer, a liquid crystal panel or the like to classify the defects, more particularly to a defect reviewing apparatus having a function of automatically collecting images of defective portions at a high speed and a function of automatically classifying the images with a good precision, and a defect reviewing method using a defect reviewing apparatus.
2. Description of the Related Art
There has increasingly advanced miniaturization of a circuit pattern formed in a semiconductor wafer. The advancement of the miniaturization of the circuit pattern increases influences, on a product yield, of defects generated in a process of manufacturing the wafer, and it is increasingly important to manage a manufacturing stage so as to prevent such defects from being generated. At present, in a site where the semiconductor wafer is manufactured, in general, a yield countermeasure has been taken by use of a wafer inspection device and an observation device. The inspection device checks a portion on the wafer where the defect exists at a high speed. A state of the wafer surface is formed into an image by use of optical means or an electron beam, and the image is automatically processed to check the presence of the defect. In the inspection device, since the high speed is important, a pixel size of an image to be acquired is set to be as large as possible (i.e., resolution is lowered) to thereby reduce an image data amount. In many cases, there is a problem that although the presence of the defect can be confirmed from the detected image having a low resolution, it is not possible to distinguish a defect type.
On the other hand, a defect reviewing apparatus is an apparatus for use in picking up an image of each defect detected by the inspection device in a state in which the pixel size is reduced (i.e., the resolution is high) to classify the defects. At present, the defect reviewing apparatus has been brought from each maker to the market. The apparatus automatically performs image pickup processing or classification processing manually or by means of a computer. The image resolution required for classifying the defects with a sufficiently high precision is determined by the defect which is a processing object in the defect reviewing apparatus. In a semiconductor manufacturing process in which the miniaturization increasingly advances, the defect size reaches the order of several tens of nanometers. For this or another reason, the defect reviewing apparatus starts to be used in which a scanning electron microscope capable of reducing the pixel size to several nanometers is used.
In Japanese JP-A-2001-331784, there are disclosed outlines of device constitution and function of a scanning electron microscope (hereinafter referred to as the review SEM) for reviewing the defects, for use in a semiconductor production site. In the publication, an automatic defect classification (hereinafter referred to as the ADC) technology is described in which coordinate data of each defect obtained from the wafer inspection device and the wafer are supplied to the review SEM to thereby automatically acquire (automatic defect review: hereinafter referred to as ADR) an image (hereinafter referred to as the defect image) including each defect in a field of view and an image (reference image) of a non-defective pattern that does not include any defect in the same view field as that of the defect image (hereinafter referred to as automatic defect review: ADC), and the defects are classified by use of these images.
Moreover, as to a throughput increasing technology of this ADR, in JP-A-2003-98114, there is described a technology to estimate a defect position from the field of view by use of periodicity information of a defect background circuit pattern estimated from the defect image. This technology is suitable for a case where the defect exists in a pattern (e.g., a memory cell pattern of a semiconductor memory) in which the same circuit structure is periodically disposed in the field of view. Furthermore, since the ADR can be executed without acquiring any reference image, a processing time (i.e., image acquiring time) of the ADR can be largely reduced.
Additionally, as one of the most important technical problems in the review SEM, there increases the throughput of the ADR in which the defect position is automatically extracted from the field of view of the defect image. In the ADR processing performed in the review SEM, the image needs to be picked up at low and high magnifications, when the image of one defect is acquired. Usually, two types of images are picked up: the defect image; and the reference image, various types of overheads (e.g., automatic focusing before the acquisition of the image, stage movement for moving the field of view of the microscope from an image pickup position of the defect image to that of the reference image, etc.) accompanying the image pickup are large, and a time of about four seconds is required for each defect. Therefore, it is important to reduce an overhead time such as an image pickup time and reduce the time per defect in order to enhance an operation rate of the review apparatus.
However, in the ADR processing in which any reference image is not used as described in JP-A-2003-98114, the high throughput of the processing can be realized, but it is not considered that subsequently performed classification processing of the defect images be performed at a high degree of certainty.
In consequence, in either of JP-A-2001-331784 and JP-A-2003-98114, any consideration is not given to the technology of the ADC processing in a high-throughput ADR sequence or to the ADR and ADC processing to handle various circuit patterns formed in the semiconductor wafer.